The present invention relates generally to servo loop hardware utilized in testing integrated circuit chips, and more particularly to utilizing additional logic circuitry provided on ADC (analog to digital converter) chips being tested as part of the servo loop hardware, the remaining portion of the servo loop hardware being provided in a test board external to the ADC chips.
Referring to FIG. 1, prior art ADC test system 100A includes computer-controlled automatic test equipment (ATE) 12, which can be implemented by means of any of a variety of commercially available automatic (i.e., computer-controlled) integrated circuit chip test systems. Automatic test equipment 12 is coupled by control conductor 16A, digital bus 16, control conductor 17, digital bus 24, and control conductor 23 to a “special test board” 1A into which a DUT (device under test) 10A is plugged. An ADC chip 10 to be tested is included in DUT 10A. DUT 10A can also include control circuitry and interface circuitry etc. Special test board 1A also is referred to herein as “servo loop board 1A”, and includes a target code register 14, an ADC data register 15, a digital comparator 18, and an integrator 32. Target register 14 has a digital output bus 20 connected to one input of digital comparator 18. ADC data register 15 has a control input connected to control conductor 17 and a digital input connected to digital bus 24. Digital bus 24 is also connected to the digital output of ADC 10 in DUT 10A. ADC data register 15 has a digital output bus 19 connected to another input of digital comparator 18. ADC 10 can, for example, be a 12 bit ADC, in which case the various digital buses are 12 bit buses. The output of digital comparator 18 is connected by conductor 26 to a control terminal of a single pole, double throw switch circuit S1 in integrator 32. Integrator 32 also includes an operational amplifier 30, an integrating capacitor C, a current source −I and another current source +I. The pole terminal of switch circuit S1 is connected by conductor 29 to the (−) input of operational amplifier 30 and to one terminal of integrating capacitor C, the other terminal of which is connected by conductor 25 to the output of operational amplifier 30 and to the input of ADC chip 10. Conductor 25 also is connected to the voltage measuring terminal of a precision voltmeter 34 which is included in automatic test equipment 12. One terminal of switch circuit S1 is connected to current source −I so that a constant current flows out of that terminal to ground. The other terminal of switch S1 is to receive a constant current from current source +I. The voltage Vin on conductor 25 produced by integrator 32 thus ramps up when switch S1 connects conductor 29 to current source −I and ramps down when switch S1 connects conductor 29 to current source +I.
Automatic test equipment 12 can be a very complex, expensive automatic test system or it can be a relatively simple, inexpensive system. Every differently designed ADC chip requires an associated unique “servo loop board” such as 1A which must be designed to interface between the automatic test equipment 12 and the ADC chip 10 to be tested.
A common method for testing a ADC device is to use a “servo loop method”. This method is widely used because it reduces the amount of required testing time, averages out noise in the system, and thereby increases the accuracy and repeatability of the test results. For the servo loop method, special servo loop boards which may be very expensive (for example, as much as $3000 each) are required, and in some cases they may not even be available.
When the analog input voltage Vin on conductor 25 is applied to integrated circuit ADC chip 10 in the course of testing it in the prior art system of FIG. 1, the digital output code Dout which is produced by ADC chip 10 has been influenced by noise that inevitably is present in servo loop board 1A, including noise present on the digital bus 24, on power supply conductors (not shown), and on the analog signal Vin applied to the input of ADC 10.
It should be understood that conventional ADC test system 100A measures the values of analog input “transition voltages” of Vin in response to which the ADC digital output signal Dout on bus 24 switches from each digital output level to the next higher digital output level (or to the next lower digital output level). Testing and/or characterization of integrated circuit ADCs is based on the values of such transition voltages. The analog voltage is ramped up and down, and the transition voltage measurement begins when the input signal Vin has “oscillated” up and down around the actual transition voltage for a sufficient amount of time. The sufficient amount of time before starting each transition voltage measurement, i.e., the waiting time before starting the measurement by voltmeter 34, typically should be based on a worst-case ADC testing scenario, for example a scenario in which the initial input voltage Vin applied to the ADC is far from the actual transition voltage. In this worst case scenario, the integrating time before Vin reaches the actual transition voltage will be a long time. The selection of the actual waiting time before starting the voltmeter measurement should be based on that long time. After all of the appropriate transition voltages for the ADC have been measured, converted to digital representations thereof, and stored for future use, then the needed characteristics of the ADC chip can be computed and compared to appropriate reference values to determine if the ADC chip performance is acceptable.
As an example, after an initial target code value has been loaded into target code register 14, the analog input voltage Vin of ADC chip 10 is ramped up (or down) to a voltage level corresponding to the present target code in target code register 14, and ADC chip 10 generates corresponding values of Dout. The corresponding value of Dout might be greater than the present target code value. The purpose of the servo loop is to lower (or increase) the analog input signal Vin until ADC chip 10 provides a value of Dout that is lower than (or greater than or equal to) the target code value in register 14. When this happens, the servo loop reverses the direction of change of Vin on conductor 25, causing it to increase (or decrease).
Vin is repeatedly ramped up and down around the average transition voltage in this manner, depending on the resulting noise-dependent values of the ADC output code Dout. Dout may, for example, be 1-3 LSB (least significant bit) values above or below the present target code value. The number of times Dout “crosses over” from below the present target code value to above that value and vice versa depends on the particular test system and DUT noise levels therein, but a somewhat typical number of crossover times might be 8, depending on the resolution of ADC chip 10. After that number of crossovers has occurred, analog voltmeter 34 makes a relatively slow measurement of Vin over a sufficiently long period (e.g., 20 milliseconds) so as to provide a precise transition voltage wherein the ramping up and down of the input Vin and the various noise components have been averaged. The values of the transition voltage measured by analog voltmeter 34 in automatic test equipment 12 are stored in a memory (not shown) for use in subsequent computations. (For example, the DNL (differential nonlinearity) and INL (integral nonlinearity) characteristics of the ADC can be computed using the transition voltages.) Then another value of the target code is loaded into target code register 14 and the foregoing process is repeated for a desired number of additional target code values.
The increments of Vin which cause each of the one-LSB changes in Dout should be identical, but as a practical matter they are not. The differential nonlinearity (DNL) and integral nonlinearity (INL) characteristics indicate the extent to which the LSB changes are not identical. The difference of the LSB change in each value of Dout from the average LSB change of Dout is the differential nonlinearity DNL. An ideal value of both of the DNL and the INL of an ADC is zero, but as a practical matter some values of the differential nonlinearity can be 10 to 90% greater than or less than the average LSB value. For example, the DNL for this particular code might be 20% greater than average, i.e., +0.2 LSB greater than the average (or −0.2 LSB less than average).
To calculate the differential nonlinearity for every value of Dout, it is necessary to have the values of all of the upper side transition voltages and lower side transition voltages of ADC 10 so that for any particular value of Dout the upper side transition voltage and lower side transition voltage both are captured and stored for subsequent use in the conventional ADC chip testing process. As an example of measurement of an “upper side transition voltage”, assume that for a particular value of Vin the ADC performs a conversion and produces a value of Dout equal to 10. Assume that as Vin continues to ramp up a bit more, the ADC produces another conversion of the slightly larger value of Vin, and the result of that conversion is the same value of Dout equal to 10. The ramping up of Vin continues a bit more, and this time the ADC converts a value of Vin to a Dout value of 11. That means the “upper side transition voltage” or “upper border” associated with the Dout value of 10 has been crossed. That causes the output state of digital comparator 18 to change, thereby reversing the direction of ramping of Vin.
Similarly, as an example of measurement of a “lower side transition voltage”, assume that for a particular value of Vin the ADC performs a conversion and produces a value of Dout equal to 10. Assume that as Vin continues to ramp down a bit more, the ADC produces another conversion of the slightly smaller value of Vin, and the result of that conversion is the same value of Dout equal to 10. The ramping down of Vin continues a bit more, and this time the ADC converts a value of Vin to a Dout value of 9. That means the “lower side transition voltage” or “lower border” associated with the Dout value of 10 has been crossed. That causes the output state of digital comparator 18 to change, thereby reversing the direction of ramping of Vin.
FIG. 2 shows the waveforms “LOAD TARGET CODE” on conductor 16A, “CONVERT” on conductor 23 and the resulting “Dout SAMPLES” on bus 24, the comparator output “COMP OUT” on conductor 26, and “Vin” generated by integrator 32 on the input conductor 25 of ADC 10. The “LOAD TARGET CODE” waveform indicates times at which a new target code is loaded by automatic test equipment 12 into target code register 14. The COMP OUT waveform indicates the outputs generated by digital comparator 18 on conductor 26 in response to comparison of the Dout samples on bus 24 which have been loaded into ADC data register 15 and applied to one input of digital comparator 18. Each change in the COMP OUT waveform in FIG. 2 causes integrator 32 to reverse the direction of the ramp signal Vin produced on ADC input conductor 25. At time T1 in FIG. 2, automatic test equipment 12 has made a decision to cause analog voltmeter 34 to begin measuring the “transition voltage”.
A problem with the system of Prior art FIG. 1 is that sufficient time must be allowed for the above mentioned “worst case” scenario for testing any DUT, and that worst case amount of time may be two or three times as long as the amount of time required for testing a typical DUT of the same kind. The voltmeter measurement during an interval T2 is lengthy because the integrator output voltage Vin on conductor 25 is continuously ramping up and down. Also, longer voltmeter measurement times ensure adequate averaging of the noise that is inherently present on Vin conductor 25 of servo loop board 1A due to the fact that the conductors of Dout bus 24 are changing state after the ADC conversions and imparting noise into the test board. At the end of the voltmeter averaging measurement, which occurs at time T2, a new target code is loaded into target register 14 by automatic test equipment 12, and the foregoing process then is repeated for the new target code.
Note that in FIG. 1, the ADC chip sends out the acquired ADC data Dout via bus 24 to the test system 12 to control the servo loop. The large amount of noise resulting from digital communication of Dout from ADC 10 to the input of digital comparator 18 can result in substantial inaccuracy in the measurement of the above described transition voltages. Consequently, analog voltmeter 34 may need to average its measurement over a much longer time (i.e., a much larger number of ADC conversion times) than would be necessary in the absence of such noise. That noise is added to other electrical noise present on the final test board and contributes substantially to the inaccuracy of each value of Dout produced during the testing of ADC chip 10. This noise can also affect the performance of any additional DUTs of the same kind if they are simultaneously tested on the same servo loop board IA. Another problem is that a substantial amount of time, e.g. 10 microseconds, may be required to send the digital conversion results from ADC 10 to digital comparator 18 if the servo loop board 1A is implemented by means of a slow data bus, such as a data bus having an I2C data format.
Other available servo loop boards are specially designed for specific automatic test equipment and/or a specific ADC. Such servo loop boards are expensive. Even more expensive general purpose servo loop boards are available, but they typically need adjustments in order to be operable when plugged into final test boards for automatic test equipment. For example, the servo loop user interface, speed, or signal levels of the general purpose servo loop board may not match those used on the DUT to conduct the ADC conversion result Dout to one input of the digital comparator of such a general purpose servo loop board. Also, the general purpose servo loop board might not be operable from the available power supply voltage range. Dealing with such incompatibilities between the automatic test system and the general-purpose servo loop board typically is time-consuming for system debugging, and furthermore is very costly. For example, one general purpose servo loop board containing a servo loop costs about $3000.
Thus, there is an unmet need for a way of testing an ADC device or chip that reduces the amount of test hardware required to implement a servo loop test method of testing the ADC.
There also is an unmet need for a way of testing an ADC device or chip that reduces the amount of test hardware required to implement a servo loop test method of testing the ADC and also substantially improves the conversion accuracy of the ADC during the testing.
There also is an unmet need for a way of testing an ADC device or chip that reduces the amount of test hardware required to implement a servo loop test method of testing the ADC and is easily applicable to testing of any ADC and is not limited to a certain ADC resolution, a specific user interface, a specific interface speed, or a specific automatic integrated circuit chip test system.
There also is an unmet need for a way of testing an ADC device or chip that reduces the amount of test hardware required to implement a servo loop test method of testing the ADC and which reduces the amount of time required to test the ADC.
There also is an unmet need for a way of testing an ADC device or chip that reduces the amount of test hardware required to implement a servo loop test method of testing the ADC and also improves ADC test results by eliminating noise on digital communication lines.
There also is an unmet need for a way of testing an ADC device or chip that reduces the amount of test hardware required to implement a servo loop test method of testing the ADC and also reduces test program debugging time.
There also is an unmet need for a way of testing an ADC device or chip that makes it easy for customers to verify ADC performance data supplied by the manufacturer.